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Eeprom Chip Ic 24c256

Eeprom Chip Ic 24c256

Regular price Rs 250
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SKU:Dell,B129,TMD10,Th5,KRT,dell

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EEPROM 24c256 is a 256K-bit Serial CMOS EEPROM. EEPROM 24c256 is internally organized as 32,768 words of 8 bits each. Catalyst’s advanced CMOS technology substantially reduces device power requirements. The 24WC256 features a 64-byte page write buffer. The device operates via the I2 C bus serial interface and is available in 8- pin DIP or 8-pin SOIC packages.EEPROM 24c256 supports the I2C Bus data transmission protocol. This Inter-Integrated Circuit Bus protocol of EEPROM 24c256 defines any device that sends data to the bus to be a transmitter and any device receiving data to be a receiver. The transfer is controlled by the Master device which generates the serial clock and all START and STOP conditions for bus access. The EEPROM 24c256 operates as a Slave device. Both the Master device and Slave device can operate as either transmitter or receiver, but the Master device controls which mode is activated.

                  Image result for 24C256

Link For DataSheet EEPROM 24c256:

https://www.alldatasheet.com/datasheet-pdf/pdf/57368/CATALYST/CAT24WC256J1TE13.html

EEPROM 24c256 Features:

  1. 1MHz I2 C bus compatible
  2. 1.8 to 6 volt operation
  3. Low power CMOS technology
  4. 64-byte page write buffer
  5. Self-timed write cycle with auto-clear
  6. 100,000 program/erase cycles
  7. 100 year data retention
  8. 8-pin DIP or 8-pin SOIC

Package Includes:

  • 1 x EEPROM 24c256 IC

 

 

 

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Description

EEPROM 24c256 is a 256K-bit Serial CMOS EEPROM. EEPROM 24c256 is internally organized as 32,768 words of 8 bits each. Catalyst’s advanced CMOS technology substantially reduces device power requirements. The 24WC256 features a 64-byte page write buffer. The device operates via the I2 C bus serial interface and is available in 8- pin DIP or 8-pin SOIC packages.EEPROM 24c256 supports the I2C Bus data transmission protocol. This Inter-Integrated Circuit Bus protocol of EEPROM 24c256 defines any device that sends data to the bus to be a transmitter and any device receiving data to be a receiver. The transfer is controlled by the Master device which generates the serial clock and all START and STOP conditions for bus access. The EEPROM 24c256 operates as a Slave device. Both the Master device and Slave device can operate as either transmitter or receiver, but the Master device controls which mode is activated.

                  Image result for 24C256

Link For DataSheet EEPROM 24c256:

https://www.alldatasheet.com/datasheet-pdf/pdf/57368/CATALYST/CAT24WC256J1TE13.html

EEPROM 24c256 Features:

  1. 1MHz I2 C bus compatible
  2. 1.8 to 6 volt operation
  3. Low power CMOS technology
  4. 64-byte page write buffer
  5. Self-timed write cycle with auto-clear
  6. 100,000 program/erase cycles
  7. 100 year data retention
  8. 8-pin DIP or 8-pin SOIC

Package Includes:

  • 1 x EEPROM 24c256 IC